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Terminal Symbols Signal Equiv + Panel Auto-Connect Functionality

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5 comments

  • Jonathan Dermont
    Jonathan Dermont

    Hi Mitchell,

    The autoconnect is supposed to find the shortest path way for auto routing. But there are other scenarios you can play with. Have you tried any of the connection methods?

    There's also different algorithm's at the bottom of those settings. 

    Regards,

    Jon D

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  • Mitchell Cross
    Mitchell Cross

    Hey Jon,

    I have played around with all the connection methods and tried every variation. I don't believe the issue is in the settings, but in the way the algorithm chooses which model pin to route to.

    Referring to the first two images in the first post and using either 'Graphical schema connections' or 'Use only connections with assigned wires/conductors in schematics' I would have expected there to be a one to one symbol pin to model pin association. Since each pin has its unique schematic connection, and in the DBE the component has a unique association from symbol pins to model pins, after running 'auto connect' I would expect that each model pin would have a single connection in the panel layout.

    However this not the case when symbol/model pins have the same signal equiv.

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  • Jonathan Dermont
    Jonathan Dermont

    Hi Mitchell,

    I would submit this to the ZGS to have them take a better look at it. Without having the file i cannot test it.

    Do you give your models the ability to have both top and bottom connections? The bigger model i'm not sure what it is, but seems like it would only have only bottom or top connections which would stop the auto wiring out the top or bottom.

    Setting the equivalent to 0 will mean there is no signal equiv so it cannot wire by the signal. I wouldn't say that there's a set way to do this, it depends on what you're trying to achieve. Again, i'd have to actually have the drawing and know what your trying to get at.

    In the settings if you choose the graphical schema connections, it should wire up how you have it connected in the schematic regardless of how the signals are in the database (signal equiv).

    Regards,

    Jon 

     

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  • Mitchell Cross
    Mitchell Cross

    Hey Jon,

    I'll submit the issue to ZGS, if they have a solution or can shed light on this I'll post an update.

    "Do you give your models the ability to have both top and bottom connections? The bigger model i'm not sure what it is, but seems like it would only have only bottom or top connections which would stop the auto wiring out the top or bottom."

    All models have either top connection or bottom connection defined, depending on the physical connection. This shouldn't stop anything from wiring as the panel layout is correct when signal equiv is set to 0, see the last photo on the first post. The larger device is a distribution block, see here

    "Setting the equivalent to 0 will mean there is no signal equiv so it cannot wire by the signal. I wouldn't say that there's a set way to do this, it depends on what you're trying to achieve. Again, i'd have to actually have the drawing and know what your trying to get at."

    Since they are terminal/distribution blocks, I would like the signals to pass through the device as the potential would physically pass through it. The signals are being used in scripts to name wires/cables.

    "In the settings if you choose the graphical schema connections, it should wire up how you have it connected in the schematic regardless of how the signals are in the database (signal equiv)."

    That is what I assumed as well, but it is not the case.

     

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  • Mitchell Cross
    Mitchell Cross

    Response from ZGS:

    "

    The route always works over the signals. First, all pins that have the same signal are collected, then the shortest way is calculated.

    The following setting controls whether it can be routed to any signal equivalent pin , or whether it should be routed as it was connected in the schematic. Settings > Panel > Connections > Use Manually Defined Ports For Terminals in Schematic

    When this option is unchecked, Panel will use all pins, which are marked as signal equivalent in a component, as possible connection pins for a core with this signal. The core's destination pins displayed in the schematic are not necessarily used. It always chooses a pin which has the shortest core way.

    When this option is checked, the system does not consider the signal equivalence between panel pins. Exactly those panel pins are connected, that are directly assigned to schema pins.

    "

     

    I did notice that not only must the 'Use manually defined ports for terminals in schematics' be checked(It's implied only this is required), but the model pins must have port numbers and their schematic symbol pins must have 'Port name from panel' text type attached. Then in the schematics the models port number must be manually entered to this text field.

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